UltraLockDDS™ Clock System

By John Siau

November 2010

New Clock Technology from Benchmark

When Benchmark unveiled UltraLock™, it caused quite a stir. Benchmark claimed that this proprietary clock-syncing system made their converters immune to jitter. UltraLock™ keeps jitter-induced distortion at or below -135 dB FS (well below audibility). Of course, the audio community was skeptical; they set out to prove (or disprove) Benchmark’s claims. Since then, several journalists, end-users, and manufacturers of audio test-equipment have verified Benchmark’s claim of jitter-immunity.

However, there was still room for improvement. There is an asynchronous sample rate conversion (ASRC) process in UltraLock™ that adds about 1 millisecond of latency. This latency is usually only of concern when musicians are monitoring themselves real-time, post-converter. Even in this case, 1 millisecond of latency is hardly noticeable; it is roughly equivalent to having the instrument 1 foot further away. Nevertheless, it can contribute to a system-wide latency problem.

When designing the ADC16, Benchmark decided to revisit its clock-management solution, to reduce latency. The technology that Benchmark developed during this quest is called UltraLockDDS™.

Benchmark’s new UltraLockDDS™ clock system utilizes the latest low-jitter clock technology developed for high-frequency RF communications systems. The master oscillator is a low phase-noise, temperature-compensated, fixed-frequency crystal oscillator with a +/- 2 PPM frequency accuracy. This oscillator drives a 500 MHz Direct Digital Synthesis (DDS) system that generates a 3072 x WC system clock. This high-frequency clock is divided and distributed directly to the A/D converters using a high-speed PECL clock distribution chip. Each of the 8 converters is driven directly through a dedicated, matched-impedance transmission line.

Jitter attenuation is achieved with digital filters in a custom FPGA that controls the DDS system. All jitter-induced distortion artifacts are well below audibility under all operating conditions. Jitter-induced distortion is always at least 135 dB below the level of the music. The jitter-performance of UltraLockDDS™ meets or exceeds the performance of Benchmark’s UltraLock™ system, but does not use an ASRC DSP process. The elimination of the ASRC processing significantly reduces system lateancy and provides the most direct path from the A/D to the digital interface.

John Siau
John Siau


John Siau is VP and Director of Engineering at Benchmark Media Systems, Inc.